0.5 Mm2 All Digital Saw Less Polar Transmitter For Edge In 65 Nm Cmos

1401 words - 6 pages

EDGE is currently the most widely used standard for data communications in mobile phones. Its proliferation, supported by its backward compatibility with GSM, has led to a need for low-cost EDGE mobile solutions. The implementation of RF circuits on the nanoscale digital CMOS process with no or minimal process enhancements is one of the key obstacles limiting the complete single-chip integration of cellular radio functionality with digital baseband for mass production. The key challenges for the RF integration in nanoscale CMOS include non-linearity of devices and circuits, device mismatches, process parameter spread, and the increasing potential for self-interference that could be induced by one function in the SoC onto another.

The presented transmitter is part of a fully-compliant EDGE SoC and successfully overcomes these challenges at low cost. It is the first to successfully demonstrate a truly fully-digital implementation for the amplitude modulation (AM) path that meets the strict far-out spectral mask limits without requiring an external SAW filter. The all-digital AM path complements the previously reported all-digital phase-modulation (PM) path in a GSM transmitter [1, 2]. The small-signal digital power amplifier (DPA), which realizes the digital modulation of the carrier’s envelope in the polar transmitter, incorporates a sigma-delta dithering module to enhance its digital-to-analog conversion resolution well beyond the 1024-level offered by its segmented thermometer transistor array. Sophisticated signal processing and filtering are applied to ensure that the noise is shaped such that it meets the strict requirements of the reception (RX) band. Inevitable impairments in the amplitude modulation circuitry, resulting form mismatches between devices in the DPA transistor arrays and from various parasitic and non-linear effects, are internally characterized during a calibration phase that precedes the normal operation, and are compensated for digitally using area-efficient mechanisms built around the look-up table (LUT) storing the calibration data.

Figure 1 illustrates the structure of the transmitter where a CORDIC is used to convert the Cartesian I/Q data from the pulse shaping filter to the polar coordinates of amplitude () and phase (). Nearly 30dB range of power control is implemented digitally by changing the gain of the digital amplitude signal. Use of adaptive interpolation along with adaptive power resolution on the digital path ensures sufficient resolution at low power while providing the complete dynamic range with minimal hardware resources. Adaptive interpolation provides higher resolution at lower power levels by increasing the interpolation factor. Digital predistortion is used to overcome the AM-AM and AM-PM non-linearities of the DPA (and may also address those of the external PA) by characterizing these distortions using the on-chip receiver and storing the distortion curves in an LUT table. The inverse...

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