Basic building block.
In the present digital programmable world, the role of FPGA has become more popular in complex designs implementation. The usage of FPGA has been increased rapidly because of its rapid increase in its performance and reprogramming ability. In today’s world most of the applications uses FPGA to process the data in the real time and prototyping in the major fields like Medical, Automotive, Aero, Embedded Applications etc.
Design flow of any FPGA based application starts with the hardware description of the circuit which is later designed, verified, synthesized, technology mapped and packed using different tools. Finally it is implemented on the FPGA.
Utilization of FPGA mainly depends on number of LUT/Versatile/ CLB used within FPGA for implementing the required design. Synthesis reports are generated once the Synthesis phase is completed successfully. Synthesis report gives the information about the number of LUT/Versatile/CLB consumed based on the type of FPGA. It also gives the Power consumption of FPGA after design is implemented.
This report mainly talks about the utilization of number of LUTs mainly depends on number of IOs directly but very much less dependent on the complexity of the design. Hence if the synthesis reports states that, for an instance – Design has used 2 LUTs, all the components within the 2 LUTs are not fully used and this in turn is directly dependent on the power consumption of FPGA.
If any design consumes of mega gate/ more LUTS it not necessary its very complex design because number of LUT consumed is mainly depends on IO rather than design complexity. Even LUTs may not be utilized fully.
An FPGA (Field Programmable Gate Array) comprises of an array of programmable logic blocks that are connected to each other through programmable interconnect network/Switching Network. Hence main components in a FPGA’s architecture include the programmable logic block and routing resources.
Fig – FPGA Architecture (http://www.globalspec.com/reference/81250/203279/chapter-29-field-programmable-gate-arrays-fpgas )
Programmable logic blocks:
The purpose of a programmable logic block in an FPGA is to provide the basic computation and storage elements used in digital logic systems. In order to satisfy the above mentioned requirement without effecting the speed or area, Size of this logic block is selected such that to form a digital circuit, minimum routing resources are required and the Programmable logic block is very efficiently utilized for smallest to smallest designs. Thus many of the leading FPGA vendors manufacture FPGA with Look Up Table (LUT) based programmable logic cells to provide basic logic and storage functionality.
Configurable logic bocks (CLB)/Programmable Logic blocks are the basic elements in a FPGA. A CLB can comprise of a single basic logic element (BLE) or a...