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Performance Evaluation Of Discrete Wavelet Transform Architecture

1441 words - 6 pages

Discrete wavelet transform has an inherent time-scale locality characteristics which provided an efficient tool for various fields like signal compression, signal analysis, etc. This led to the development of various architectures that implements DWT. The original pixels are highly correlated, thus applying the compression algorithms directly does not provide an efficient compression ratio. Hence, DWT is applied which is a powerful tool to de correlate the image pixels. The 2-D wavelet filters which are separable functions, is implemented first by row-DWT and then column DWT which produces four sub band namely LL, LH, HL and HH in every decomposition level. Filtering a signal corresponds to the mathematical convolution operation of impulse response of the filter to the input signal and that is mathematically represented as,

Due to the large number of computations and storage required in the conventional DWT method, a new approach had been developed, known as “lifting scheme”. It is a new method of constructing wavelet basis, which was introduced by Swelden (1996). The lifting based forward DWT as shown in Fig.3 involves three basic steps as follows:

In this proposed method shown in Fig.7, image pixels are taken in a block manner instead of singe row. First the row processor computes 1D DWT output. Then the result is produced in the vertical manner. The vertical 1D DWT outputs are now ready for the column wise filtering operation; it leads to generate 2D DWT output. From the column processor output components LL, LH, HL and HH, the detailed component LL is useful for the compressed image retrieval. This block row processor takes block of rows which improves the speed of operation as compared with the previously proposed parallel filter architecture. Table 2 and 3 involves the results of block row processor architecture.This fast convolution shown in Fig.8 improves the performance of conventional convolution. It avoids the need of a transpose circuit between the two levels, the system starts the column processing as soon as sufficient numbers of rows have been filtered. Implementation of the 2-D Discrete Wavelet Transform is designed with two fast convolution based blocks. The first one i.e. sub cell –I block realizes the row Discrete Wavelet Transform and uses D Latch devices for the X (n) storage. The second block achieves the Column Discrete Wavelet Transform using block RAM storage of the computed rows. Then with the help of delay unit sub cell II computes column wise filtering output. .1.1 Booth Encoder
The fast convolution was implemented using booth multiplier to improve its performance from the previous mentioned method. The booth algorithm encodes multiplier bits and partial product generation. Radix2, radix4.radix8, radix16, radix32 are the different modified booth algorithms. In the NXN bit multiplication N partial products are obtained. In the case of modified Radix2 ^ r produces N/r partial. The modified booth reduces the number...

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