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Power Optimisation Essay

895 words - 4 pages

Many different approaches are used to reduce power consumption at the circuit level design. Some of the main techniques are Transistor Sizing, Voltage Scaling, Voltage Islands, Multiple Threshold Voltages and Power Gating. There is a negative effect with each power optimisation technique used at the expense of performance or area. Rabaey (1996) states that Transistor Sizing (TS) technique is used to adjust the size of each transistor (smallest element in the digital system) or gate (group of transistors) for minimum power at the expense of the performance of the gate. Rabaey also states that transistor size is changed only if its place is not critical and it will not affect the whole circuit ...view middle of the document...

Recent technology can build transistors with different thresholds. Power can be saved by using a mixture of transistors with two or more different threshold voltages. In the simplest form there are two different thresholds available, common called High-Vth and Low-Vth. High threshold transistors are slower but less power consumption, and can be used in non-critical circuits. Tawfik & Kursun (2009) found that when the circuits are individually optimized for minimum power consumption, the proposed level converters offer significant power savings of up to 70% as compared to the previous techniques. Finally, Won et al. (2003) propose best power optimisation technique found so far called Power gating, also known as MTCMOS, or Multi-Threshold Complementary metal–oxide–semiconductor (CMOS). As shown in the Figure 1 that illustrates the basic circuit scheme of MTCMOS This technique uses high Vth sleep transistors which cut-off a circuit block when the block is not switching from 0 to 1 or from 1 to 0. The MTCMOS circuit technology can achieve a lower threshold voltage, and therefore, higher performance as well as smaller standby leakage power.
To keep power consumption under control many techniques have been used in the high-level stage of designing embedded systems. Digital circuits can be seen in the high level as a group of functional units and memory units to save the previous state of the signal called Flip Flops (FFs). The later need signal called clock signal to run the circuit and generate sequence of states. According to Weng et al. (2012) clock signals can be shut off when a circuit is in the idle state or when FFs do...

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