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# R S Flip Flops Essay

1291 words - 5 pages

RS-type NAND Flip FlopA basic logical device for information storage is the flip-flop (abbr. FF). A flip-flop can stay in one of two logic states. To change this stage it needs a new input signal. Thus a flip-flop is a one bit memory. A flip-flop containing a 1 is said to be set, if it contains a 0 it is reset. There exist three basic types of flip-flops:* Memory flip-flops have special inputs to be set or reset. The flip-flop preserves its state as long as there is no new input signal.* Delay flip-flops output the state their input had one cycle ago. If the input signal changes at step n the output changes at step n+1.* Toggle flip-flop or"T" flip-flop changes its output on each clock cycle, if the input given to T is high. If the input of T is low the, the output does not change that means the output is preserved.A simple memory flip-flop is the RS flip-flop (sometimes also called SR flip-flop). The device has two inputs: S for setting and R for resetting the flip-flop (hence its name). The RS flip-flop preserves its states as long as the inputs are 0. If it receives a set signal, it turns to 1, regardless of its former state. The reset signal enforces the 0-state.Figure 1.1 an RS-type Flip Flop circuit comprising two cross-coupled NAND gates -- note the inverted inputs.The most important consideration is that both inputs of the RS-type NAND Flip Flop should normally be at logic 1 -- this is in direct contrast with the RS-type NOR Flip Flop, where the inputs needed to be normally at logic 0. Because of this, the inputs are considered to be inverted in the circuit, shown as such in Figure 1.1.With both inputs of the circuit of Figure 1.1 at logic 1, the circuit is stable, with both NAND gate outputs at logic 0. When one input goes to logic 1, the output of that NAND gate goes to logic 1. This is applied to the other NAND gate's second input, so the output of the second NAND gate will go to logic 0. This output is in turn fed to the first NAND gate's second input and thus its output is forced to remain at logic 1.Applying a further logic 0 to the first NAND gate has no further effect on the circuit -- it remains stable. However, when logic 0 is applied to the second NAND gate's input causes the same reaction in the other direction. So the circuit has two stable states, hence is a Flip Flop.Figure 1.2 shows the function table for this RS-type NAND Flip Flop.Just as in the RS-type NOR Flip Flop, there is a possibility that both outputs can be forced to be the same level which produces an indeterminate outcome. In the RS-type NAND Flip Flop, this is when both inputs are at logic 0. So, circuit designers must ensure this situation does not occur in their logic circuits.Figure 1.2 a function table for an RS-type NAND Flip Flop circuitWhile these simple gate circuits are really all that's required to build flip flops in theory, practical concerns require that something is added to them before they work properly and as expected. The problem is that the...

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